This invention relates to microfabrication including microfabrication of integrated circuits. Semiconductor manufacturing includes photolithography processes. Some lithography processes include coating a wafer with a thin film of bottom anti-reflective coating (BARC) material, followed by coating with a resist, and then exposing the wafer to a pattern of light as a process step for creating microchips. Photolithography processes typically require a planar surface for depositing the various films and resists used to pattern a wafer. Films typically are specified to have a particular height and be planarized to within certain specifications, depending on a given deposition process.
Planarization is commonly performed using Chemical Mechanical Polishing/Planarization (CMP). CMP is a process that uses corrosive chemicals and a polishing pad to planarize the surface of a wafer. CMP can planarize insulators and conductors in multilevel structures. This planarization is used to stack more electronics onto another layer of a wafer, or to planarize the wafer for photo lithographic patterning. CMP is also used to fine tune the lithographic exposure process by setting a resist to a known height to optimize the exposure area.
BARC is a thin film that is placed between the substrate and the resist layer to absorb the remaining light rays during an exposure to prevent rough edges created by reflected light rays during exposure. BARC can also used between multiple layer exposures to protect the previously exposed layers from being exposed again.